{"id":838,"date":"2018-07-02T11:59:30","date_gmt":"2018-07-02T09:59:30","guid":{"rendered":"http:\/\/raytec.org\/wordpress\/?p=838"},"modified":"2018-07-02T12:04:27","modified_gmt":"2018-07-02T10:04:27","slug":"compile-gcc-8-1-for-raspberry-pi-3","status":"publish","type":"post","link":"http:\/\/raytec.org\/wordpress\/2018\/07\/02\/compile-gcc-8-1-for-raspberry-pi-3\/","title":{"rendered":"Compile GCC-8.1 for Raspberry PI 3"},"content":{"rendered":"

The British company Arm Holdings<\/a> licences the ARM Central Processing Unit (CPU) design to manufacturers such as Samsung, Apple and Broadcom for their own chip-design, which may include further functionalities into the design.
\nSince March 2018 the Raspberry PI 3B+ is available. It features a Broadcom BCM2837B0 SOC (System-on-Chip), containing an Cortex-A53<\/a> CPU. This CPU abides to the ARMv8.0-A<\/a> instruction set.<\/p>\n

The ARMv8.0-A instruction set has made previously optional functionality now mandatory. One of the biggest differences relate to the floating-point unit (FPU). Previously to make up for a missing FPU, the operating system (OS) had to provide a Software FPU, in short soft-fpu.
\nOperating Systems such as Raspbian Linux based on the rather conservative Debian Linux distribution ships with gcc-6.3.0 as default compiler, which does not know about the intricacies of the ARMv8 architecture. In fact, it assumes, it compiles for ARMv6!
\nTo verify, compile a simple C code using the base gcc-6 using the command-line
\ngcc -march=native -S -fverbose-asm -mprint-tune-info -o stub.S stub.c<\/code>
\nIn the assembler dump stub.S<\/code> You’ll find the inherent options passed (due to -fverbose-asm<\/code>) including -march=armv6<\/code>, -mfloat-abi=hard<\/code> (which is good) and -mfpu=vfp<\/code> (which is not so good).<\/p>\n

The information to provide is based on the above Wiki-pages and on output generated from cat \/proc\/cpuinfo<\/code>:
\n
\n...
\nFeatures: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva divt vfpd32 lpae evtstrm crc32
\n...
\n<\/code>
\nReading the Linux source code in file arch\/arm\/kernel\/setup.c<\/code> these include Advanced Single-Instruction Multiple Data (SIMD) instructions called NEON (neon) with 32 64-Bit registers (vfpd32) include cyclic-redundancy check instructions (crc32) but not the crypto extension (such as aes, sha1, sha2).<\/p>\n

Now we want to compile an up-to-date gcc-8.1.0 on Raspberry PI, to make best usage of the instruction set and the Cortex-A53’s units.
\nThere are already websites\/blogs documenting how to compile gcc-8.1.0<\/a>, however, they fail to address the issues mentioned above.
\nI found that configuring gcc with the following options provides good results:
\nSOURCE_DIR_OF_GCC\/configure --program-suffix=-8.1 --with-arch=armv8-a+simd+crc --with-float=hard --build=arm-linux-gnueabihf --enable-languages=c,c++,fortran,lto --disable-multilib --enable-checking=release<\/code><\/p>\n

These are the differences in the configuration with regard to the above Blog:<\/p>\n